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AAEON UP TWLS Developer Board

AAEON UP TWLS Developer Board unlocks the future of AI with a powerful development board designed for efficiency, compatibility, and seamless AI integration. This card-sized development board powers cost-effective AI applications. Powered by the Intel® Processor N150, it delivers quad-core computing performance with Intel Graphics (24 EUs), making it ideal for entry-level AI workloads. Equipped with 8GB RAM and 64GB storage, the AAEON UP TWLS Developer Board ensures smooth execution of AI models, while its 40-pin HAT GPIO enhances connectivity for various peripherals.

Features

  • Intel processor N-series
  • Onboard LPDDR5 memory, up to 8GB
  • Onboard eMMC storage, up to 128GB
  • GbE x1
  • HDMI 1.4b x1
  • USB 3.2 (Type-A) x3
  • M.2 2230 E-Key x1
  • 12V DC-in, 5A
  • TPM 2.0

Specifications

  • System
    • Intel processor N150 (formerly Twin Lake)
    • Intel UHD Graphics for 12th Gen Intel processors
    • Memory with up to 8GB LPDDR5
    • Storage with up to 128GB eMMC
    • I/O
      • HDMI 1.4b
      • 3.3V I2C x2 + PWM x2 via 8-pin wafer
      • 3.3V SPI x2 via 10-pin wafer
      • GPIO x8 via 10-pin wafer
      • RS-232/422/485 x1 via 10-pin wafer
    • USB
      • 10-pin USB 2.0 x2/UART x1
      • USB 3.2 Gen 2 Type A x3
    • M.2 2230 E-Key x1 expansion
    • HDMI 1.4b x1 display interface
    • 1GbE, RJ-45 x1 Ethernet
    • TPM 2.0 onboard security
    • RTC is available
    • OS support
      • Microsoft Windows® 10/11
      • Ubuntu 22.04 LTS
      • Yocto 5.1
  • Power requirement
    • Power 12V DC-in, 5A
    • Type AT/ATX power supply
    • 30W to 36W (typ.) power consumption
  • Mechanical
    • 3.34” x 2.20” (85mm x 56mm) dimensions
    • 0.33lb. (0.15Kg) net weight
    • 0.44lb. (0.20Kg) gross weight
  • Environment
    • +32°F to +140°F (0°C to +60°C) operating temperature with 0.5 airflow
    • 0% to 90% relative humidity, non-condensing
    • MTBF 685,218 hours
    • Certification of CE/FCC Class A, RoHS-compliant, REACH

Board Features

Mechanical Drawing - AAEON UP TWLS Developer Board

Block Diagram

Block Diagram - AAEON UP TWLS Developer Board
Veröffentlichungsdatum: 2026-05-08 | Aktualisiert: 2026-05-13