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Terasic Technologies P0017 HSMC-DVI Daughter Board

Terasic Technologies P0017 HSMC-DVI Daughter Board is a digital visual interface (DVI) transmitter board featuring a high-speed mezzanine connector (HSMC) interface. This board enables designers to access high-quality and high-resolution video signals in an FPGA. Terasic Technologies P0017 HSMC-DVI Daughter Board offers the flexibility required in high-resolution image processing systems by combining both the DVI transmitter and receiver on the same card. This daughter board features enhanced PLL noise immunity and enhanced jitter performance.

Features

  • Digital transmitter
    • DVI compliant
    • 1x DVI transmitter with single transmitting port
    • Supports resolutions from VGA to UXGA (25MHz to 165MHz pixel rates)
    • Universal graphics controller interface
      • 12-bit, dual-edge and 24-bit, and single-edge input modes
      • Adjustable 1.1V to 1.8V and standard 3.3V CMOS input signal levels
      • Fully differential and single-ended input clocking modes
      • Standard Intel™ 12-bit digital video port compatible as on Intel 81x chipsets
    • Enhanced PLL noise immunity
      • On-chip regulators and bypass capacitors to reduce system costs
    • Enhanced jitter performance
      • No HSYNC jitter anomaly
      • Negligible data-dependent jitter
    • Programmable using I2C serial interface
    • Single 3.3V supply operation
  • Digital receiver
    • 1x DVI receiver with single receiving port
    • Supports UXGA resolution (output pixel rates up to 165MHz)
    • DVI specification compliant
    • True-color, 24-bit/pixel, 16.7M colors at 1 or 2 pixels per clock
    • Laser-trimmed internal termination resistors for optimum fixed impedance matching
    • 4x oversampling
    • Reduced ground bounce using time-staggered pixel output
    • Low noise and ideal power dissipation using TI PowerPAD™ packaging

Kit Contents

  • 1x HSMC-DVI board
  • 1x system CD-ROM

Block Diagram

Block Diagram - Terasic Technologies P0017 HSMC-DVI Daughter Board

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Veröffentlichungsdatum: 2019-08-29 | Aktualisiert: 2024-02-19